Current source for a magnetoresistive head with variability and selectable slew rate

ABSTRACT

A low noise current source circuit is disclosed for biasing a magnetoresistive (MR) read head. The current source comprises a field-effect transistor (FET) cascoded to a second transistor which, in turn, is coupled to the MR element. A filter device including a capacitor is coupled across the gate-source junction of the FET, and a sensing device, such as a resistor, is coupled to the gate of the FET for detecting current flowing into said capacitor. Boost circuitry, coupled to the sensing device, boosts the charge/discharge rate of the filter capacitor when the voltage of the sensing device exceeds a certain threshold.

This application is a continuation, of application Ser. No. 08/552,652,filed Nov. 3, 1995, now abandoned.

BACKGROUND OF THE INVENTION

1. Technical Field

This invention generally relates to current sources, and morespecifically relates to low noise current sources with variability andselectable slew rates used for magnetoresistive (MR) heads.

2. Background Art

In magnetic technology, a magnetoresistive (MR) read element requires aDC current bias to excite the element. Various techniques are used tobias and sense the change in resistance of the MR head.

One method of generating the DC current bias is achieved by using a lowpass feedback loop that maintains a constant DC voltage across the head.The output of the feedback loop is a current source that maintains aconstant voltage drop across the MR element. A single stripe MR headrequires two connections. One connection is from the current source inthe voltage bias control loop. The other connection of the head could bea DC voltage, ground, or another current source. If another currentsource is used, it is normally regulated by a feedback loop thatregulates the common mode voltage of the head to a desired voltage.

Typical low corner frequencies of the voltage bias feedback loop are onthe order of 100 KHz to 1 MHz, consequently a low frequency pole isrequired. The change of resistance of an MR head is very small,generating typically less than 1 mV of sign The small signal requiresthe bias current through the MR to be low noise.

U.S. Pat. No. 4,879,610, entitled "Protective Circuit for aMagnetoresistive Element," by Jove et al., issued Nov. 7, 1989, andassigned to International Business Machines Corporation, discloses atypical current source circuit design for biasing MR heads. A capacitoris used to filter out noise, and is charged and discharged according toa feedback circuit.

A typical disk drive has two MR heads for each disk or platter. Sinceeach MR head has a different resistance, each MR head may require adifferent voltage bias for optimum operation. It is important then thatthe voltage drop across the MR be variable from head to head. As aresult, the current or voltage bias must also change, a feature notdisclosed in typical MR voltage bias feedback loop circuits.

Furthermore, as the currents through the read head increase, it isdifficult to keep the input impedance of the current source high enoughto allow noise filtering without the use of a large capacitor.Unfortunately, the slew rate of the current source circuit is limited byhow fast this capacitor can be charged, and in a closed loop systemwhere the current may be different for different heads, head switchingtimes are limited in part by the charging rate of the capacitor.

Some other examples of prior art circuitry that affect slew rate and/orshow related circuitry are found in the following U.S. Patents andarticle and are hereby incorporated by reference: U.S. Pat. No.4,390,825 issued to Ginn in June 1983; U.S. Pat. No. 4,498,058 issued toBenrud in February 1985; U.S. Pat. No. 4,540,952 issued to Williams inSeptember 1985; U.S. Pat. No. 4,706,138 issued to Jove et al. inNovember 1987; U.S. Pat. No. 4,881,045 issued to Dillman in November1989; U.S. Pat. No. 4,902,984 issued to Vinn et al. in February 1990;U.S. Pat. No. 4,992,674 issued to Smith in February 1991; U.S. Pat. No.5,008,565 issued to Taylor in April 1991; U.S. Pat. No. 5,153,452 issuedto Iwamura et al. in October 1992; U.S. Pat. No. 5,160,857 issued toBarre in November 1992; U.S. Pat. No. 5,317,669 issued to Anderson etal. in May 1994; U.S. Pat. No. 5,343,164 issued to Holmdahl in August1994; U.S. Pat. No. 5,384,501 issued to Koyama et al. in January 1995;and "Magnetic Recording Channel Front-Ends" by Klaassen, IEEETransactions on Magnetics, Vol. 27, No. 6, November 1991.

Although the aforementioned patents describe methods and boost circuitsfor enhancing the slew rate of a system and other similar features,these boost circuits would normally not work very well for MR currentsource circuitry since they would change the bias levels of upstreamcircuitry to reduce the settling time. Settling times of changes of thecurrent source are shorter than what the normal bandpass used for noisefiltering and/or the voltage bias control loop. Shorter settling timesare required when initially biasing an MR element during head to headswitching. Attempting to decrease settling time by increasing thebiasing of an upstream amplifier could lead to differences in thecurrent source value in the `fast settle` mode when compared to the biaslevel achieved in the normal mode of operation. If the difference islarge enough, the circuitry must resettle at normal bias levels duringnormal mode operations, thus ultimately slowing up the system.

Therefore, there existed a need to provide a current source circuit andboost circuit utilizing technology that would not only allow forvariability and a faster head switching time, but would maintain and mayeven increase stability and noise reduction.

SUMMARY OF THE INVENTION

It is an advantage of the present invention to provide an MR currentsource circuit with boost circuitry that creates a faster MR head tohead switching time, thus allowing for faster computer hard drivereading speeds.

It is a further advantage of the present invention to provide an MRcurrent source circuit with FET (field effect transistor) technologythat will allow better filtering of upstream circuitry noise and, if afeedback loop is used to control the current source, loop stabilityusing a single capacitor.

It is yet another advantage of the present invention to provide an MRcurrent source circuit having a boost circuit that does not change thebias levels of upstream circuitry.

In accordance with the present invention, an MR current source circuitis disclosed using FET technology. Furthermore, a method is disclosed togenerate a DC current bias. The current source circuit comprises acurrent biasing device, which is a FET cascoded to a second transistorthat is in turn coupled to the MR element. A filter device including acapacitor is coupled across the gate-source junction of the FET, and asensing device, such as a resistor, is coupled to the gate of the FETfor detecting current flowing into a capacitor. Boost circuitry, coupledto the sensing device, boosts the charge/discharge rate of the filtercapacitor when the voltage of the sensing device exceeds a certainthreshold. The current source circuit can be used either in astand-alone fashion or in a feedback loop. A method to generate the DCcurrent bias, imbed the DC current bias in a variable voltage biascontrol loop, and provide a means to allow a rapid slew rate of thecurrent bias in an open or closed loop configuration is also disclosed.

The foregoing and other features and advantages of the invention will beapparent from the following more particular description of preferredembodiments of the invention, as illustrated in the accompanyingdrawings.

BRIEF DESCRIPTION OF DRAWINGS

The preferred exemplary embodiments of the present invention willhereinafter be described in conjunction with the appended drawings,where like designations denote like elements.

FIG. 1 is a circuit diagram of a current source circuit in accordancewith an embodiment of the present invention;

FIG. 2 is a circuit diagram of the current source circuit as shown inFIG. 1 together with boost circuitry in accordance with an embodiment ofthe present invention;

FIG. 3 is a circuit diagram of an alternate embodiment of the circuit asshown in FIG. 2 that is fundamentally the same except the current sourcecircuit uses a transistor in place of a resistor and the boost circuitryhas transistors in place of op-amps;

FIG. 4 is a circuit diagram of an alternate embodiment of the currentsource as shown in FIG. 1 used within an MR voltage bias feedback loopin accordance with a second embodiment of the present invention; and

FIG. 5 is a circuit diagram of an alternate embodiment that isfundamentally the same as the circuit shown in FIG. 4.

BEST MODE FOR CARRYING OUT THE INVENTION

Referring to FIG. 1, a current source circuit 20 in accordance with anembodiment of the present invention is shown. A current biasing device24 of the current source circuit 20 consists of an N channel FET 23(T23) cascoded with another N channel FET or bipolar NPN device 22(T22). T23 is cascoded in order to increase the output impedance of thecurrent source and to keep the voltage of the FET from drain to sourceconstant. Since the device (T23) biasing the MR element 21 needs to below noise, a noise filter capacitor 28 (C28) from an RC filter isconnected from the gate of T23 to the source of T23 to filter noise fromupstream circuitry. The base of T22 is biased to a constant voltage withrespect to the drain of T23. This increases the output impedance of thecurrent source circuit and improves the power supply rejection. T23 caneither be operated in the saturated region, where it acts as a currentsource and biasing device or in the triode region where it acts as avariable emitter resistor for T22. The RC filter comprising C28 andresistor 26 (R26) is not only used for noise filtering, but also forloop stability when the current source circuit is used in a feedbackloop.

Use of the FET 23 allows the use of only one capacitor for loopstability and noise filtering. At MR bias currents of 10 to 20 mA and 5V supplies, one cannot put a large enough emitter resistor in a BJT toraise its base input impedance high enough to stabilize a feedback loopusing a single capacitor or filter low frequency upstream circuitrynoise. By tailoring the FET dimensions (width and length) one canminimize the FET gm and minimize the FET intrinsic noise. A MOS FET gateinput impedance is high as a result of the device design. The use of aFET also allows one to sense the current flowing into the RC filter,this allows the feedback loop to go into a high slew mode when thecurrent into the RC filter exceeds a threshold, allowing faster MR headto head switching times.

The read head 21 is biased by a current supplied by the voltage source25 through the current biasing device 24 and by a current supplied by asourcing current source 18 that can be made up of complementary devicesas shown. Although a current source 18 is shown for the sourcing currentsource, a fixed voltage or resistance may also be used and is within thescope of the invention. The sourcing current source is typicallycontrolled by a feedback loop (shown in FIGS. 5 and 6) that adjusts thecurrent source such that the common mode of the MR element is at a fixedpotential. Because the FET device T23 has low input current at steadystate, a current sensing device, which includes a resistor 26, can beplaced in series with the gate to detect the current flowing into thefilter capacitor 28 (C28) connected to its gate. The current sensingdevice could be a resistor or diode in its simplest form together withthe measuring of the voltage across the resistor or diode. Voltagesource 27 is used to bias the cascode device 722, such that T23 is inthe linear region. Careful selection of resistor 29 (R29) can reduce theoverall noise of the transistor/resistor combination, but may be removedwithout affecting the stability of the current source of the presentinvention as seen in FIGS. 5 and 6. R29 can also be implemented throughan N channel FET used in the triode region.

FIG. 2 shows the current source circuit of FIG. 1 (elements 18-29corresponding to elements 118-129 respectively) together with a boostcircuit (elements 30-34), wherein the boost circuit increases the slewrate of the capacitor 128 of the current source circuit withoutrequiring a change in the bias level of upstream circuitry. When thecurrent, which is sensed through resistor 126 (R126), exceeds a certainthreshold, the current boost circuit 30 is enabled to multiply thesensed current through current source 32 and thus increase the chargingrate of the capacitor 128 (C128). As the gate of the FET 123 is chargednear its steady state level, the sensed current will decrease throughcurrent source 33 until the current falls below the threshold.Specifically, differential voltage buffers 31 (one is being inverted)sense the voltage across the resistor R126. This voltage is thencompared against a threshold set by voltage source 34. When thethreshold is exceeded, either current source 32 or 33 is engaged torapidly charge and discharge C128. When the voltage drop across R126falls beneath the threshold, the boost circuit 30 will be disabled andthe gate voltage will reach its final steady state using the timeconstant of R126 and C128.

FIG. 3 shows an alternate embodiment to FIG. 2. The current sourcecircuit is fundamentally the same as the current source circuit in FIG.2 except the resistor R129 of FIG. 2 is replaced by an N channel FETdevice T229. The N channel FET acts fundamentally like a resistor whenused in the triode region and, as with the resistor, will reduce theoverall noise of the current source device 222. The current sourcecircuit is shown as elements 218-229 (corresponding with elements118-129 in FIG. 2). The boost circuitry of FIG. 3 uses transistordevices 40 and 41 that operate fundamentally in the same manner as theoperational amplifiers (op-amps) 30, as shown in FIG. 2. Devices 40 and41 sense the voltage across the resistor 226 (R226). When the voltagedrop across R226 exceeds a certain voltage threshold (positive ornegative) from the base of the FET 223 to the emitter of the FET 223(V_(be)), either device 40 will turn on, increasing the charge into thecapacitor 228 (C228), or device 41 will turn on increasing the chargeout of C228. The current biasing device 224 comprises a BJT 222 cascodedto a first N channel FET device 223 having a drain, source and gate. Asecond N channel FET device 229 is then coupled to the first N channelFET device 223 instead of the resistor R29 as shown in FIG. 1. Thesource of the first FET 223 is coupled to the drain of the second FET229 and the gates of the first and second FETs are coupled together.Although the specific circuit of FIG. 3 is shown as an alternativecircuit for the boost circuit 30 of FIG. 2, many other appropriatecircuits may be used and are within the scope of the invention.

FIG. 4 is a current source circuit, which is fundamentally the same asthat shown in FIG. 1, used within a feedback loop. Elements 21-27 inFIG. 1 are shown as elements 321-327 in FIG. 4, excluding the resistors26 and 29 and voltage source 25. As aforementioned, resistor 29 may beremoved without affecting the stability of the current source. Theresistor 26 and voltage/current source 25 may be found in the feedbackcircuitry 52 and 54 and is specifically shown in FIG. 5. The feedbackloop circuit comprises a differential voltage buffer 52 with an inputand an output, wherein the input is coupled across the resistor 321 (theMR element) for sensing the voltage across the resistor 321. Acomparator 54 with a first and second input and an output compares theoutput of the buffer 52, which is connected to the first input, and areference voltage (REF), which is connected to the second input. REF canbe adjustable to allow variability of the MR voltage bias. The output ofthe comparator 54 is coupled to the gate of the FET 323, and thecapacitor 328. The slew rate of the capacitor is increased/decreasedaccording to the difference in compared voltages (i.e., the output ofthe comparator 54). Capacitor 328 provides stability and a low passfeedback loop. The object of the feedback loop is to generate a DCvoltage across the MR element 321. Beyond the bandwidth of the feedbackloop, any voltage generated by the MR element 321 will not be attenuatedby the loop.

FIG. 5 shows an alternate embodiment to the circuit shown in FIG. 4. Thecurrent source circuit comprises elements 421-428. The resistor 426 issensed by the boost circuit 440 and 441, which is similar to the boostcircuit 40 and 41 of FIG. 3. The resistor 426 and differentialamplifiers/comparators 440 and 441 make up the currentsensing/amplification section for FIG. 5. Elements 60-65 make up adifferential amplifier used in the feedback circuitry. At steady state,the currents through elements 62 and 63 will be nearly identical. Theoffset voltage generated by one half of the current source 61 and theresistor 60 (R60) will cause an equal voltage to be generated across theMR head 421 by the feedback loop. The current source 61 can be variableto allow a variable MR voltage bias. The RC filter comprises resistor426 and capacitor 428 as well as the output impedance at the collectorsof elements 62 and 64.

Since a faster charging/discharging rate of the capacitor is not alwaysdesired, switch 74 is used to disable the current amplification.Capacitor 76, which is parallel to switch 74 and resistor 426, filtersout transients that may falsely trigger the circuit. Because of theunique design of the current source and feedback loop, the output of thecurrent source is actually imbedded in the feedback loop. Only onecapacitor is required to achieve noise filtering and a low pass feedbackloop. Although the specific feedback loop circuit of FIG. 5 is a shownas an alternate circuit to FIG. 4, many other appropriate circuits maybe used and are within the scope of the invention.

While the invention has been particularly shown and described withreference to preferred exemplary embodiments thereof, it will beunderstood by those skilled in the art that various changes in form anddetails may be made therein without departing from the spirit and scopeof the invention.

What is claimed is:
 1. A current source circuit for a magnetoresistive(MR) element comprising:a current biasing device includinga first FEThaving a gate, source and drain, said drain of said first FET cascodedto the source of a second transistor, said current biasing devicecoupled to said MR element for supplying a variable current to said MRelement, and a second FET having a gate, source and drain, coupled tosaid source of said first FET for controlling said current to said MRelement, wherein said drain of said second FET is coupled to said sourceof said first FET and said gate of said second FET is coupled to saidgate of said first FET; and a filter device including a capacitorcoupled to said current biasing device for filtering out excess current.2. A circuit of claim 1, further comprising a sensing device coupled tosaid gate of said FET for detecting a rate of current flowing into saidcapacitor.
 3. The circuit of claim 2, further comprising a boost circuitcoupled across said sensing device for sensing a voltage on said sensingdevice and changing said rate of said current flowing into saidcapacitor when said voltage exceeds a threshold.
 4. The circuit of claim2, further comprising a feedback loop circuit with an amplifier coupledto said MR element and said current biasing device for comparing avoltage across said MR element with a reference voltage and changingsaid rate of said current flowing into said capacitor when said voltageexceeds a threshold.
 5. A method for increasing a slew rate of an MRcurrent source circuit having a filter device including a capacitor, anda boost circuit, comprising the steps of:providing a current biasingdevice including a FET having a gate, source and drain, said drain ofsaid FET cascoded to the source of a second transistor; sensing acurrent flowing into said filter device with said FET; and changing arate of said current flowing into said capacitor when said currentexceeds a threshold.
 6. The method of claim 5, further comprising thesteps of:coupling a feedback loop circuit to said MR element and saidcurrent source device; comparing with a comparator means said voltageacross said MR element with a reference voltage; and controlling saidrate of said current flowing into said capacitor when said voltageexceeds a threshold.
 7. The method of claim 6, further comprising thesteps of:providing a switch coupled to said comparator means; anddisabling said controlling of said rate of said current flowing throughsaid capacitor.
 8. The method of claim 5, further comprising the step ofsupplying a variable current to said MR element.
 9. A current sourcecircuit for a magnetoresistive (MR) element comprising:a) a currentbiasing device including a FET having a gate, source and drain, said FETcascoded to a second transistor coupled to said MR element; b) a filterdevice including a capacitor coupled to said current device; c) asensing device coupled to said gate of said FET; and d) a feedback loopcircuit coupled to said MR element and said current biasing device, saidfeedback loop comprising:d1) a differential amplifier means with aninput and an output, said input of said differential amplifier meanscoupled across said MR element; and d2) a comparator means with a firstand second input and an output, said first input of said comparatormeans connected to said output of said differential amplifier means,said second input of said comparator means coupled to said gate of saidFET, wherein said voltage of said MR element is compared with areference voltage by said comparator means for controlling said rate ofsaid current flowing through said capacitor.
 10. The circuit of claim 9,wherein biasing of said differential amplifier means of said feedbackloop circuit remains constant when settling time is decreased.
 11. Thecircuit of claim 9, wherein said feedback loop further comprises aswitch coupled to said comparator means for disabling said controllingof said rate of said current flowing through said capacitor.